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Investigate the correctness of cache faults handling #84

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endes0 opened this issue Mar 3, 2024 · 2 comments
Open

Investigate the correctness of cache faults handling #84

endes0 opened this issue Mar 3, 2024 · 2 comments

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@endes0
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endes0 commented Mar 3, 2024

There are 2 mains issues:

https://github.com/etsiiull/SIMDE/blob/d577cd8cfc7bb244ac8c1ba0ab42797ea3391797/src/core/Common/Memory.ts#L49
As we have discussed, not allowing cache faults twice in a row is not necessary, this should fail at random.

https://github.com/etsiiull/SIMDE/blob/d577cd8cfc7bb244ac8c1ba0ab42797ea3391797/src/core/Superescalar/Superescalar.ts#L495
When we get a memory fault, we stall the FU, but that instructions is still executed. The correct behavior should be to stop that instruction execution the stall time. The same happens for the VLIW.

@endes0
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endes0 commented Apr 16, 2024

I found another strange thing (possibly a bug):
I accidentally set the NoCache mode to return always a fault (the got: false should have been got: true).

public getFaultyDatum(address: number): Datum | Error {
    const data = this.memory.getData(address);
    if (data instanceof Error) return data;

    return { value: data, got: false };
  }

I expected that this would cause an infinite execution of code that uses memory instructions, as the memory FU would always stall. Instead, the machine assumes that after a fault it always gets the datum, should be this the accepted behavior?

@endes0 endes0 removed their assignment Apr 16, 2024
@oxcabe
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oxcabe commented Apr 17, 2024

The machine assumes that after a fault it always gets the datum, should be this the accepted behavior?

Confirmed it is the accepted behavior. The fault increases the latency.

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