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Fix alert_handler_lpg_sleep_mode_ping tests for silicon (and other envs) #4025

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Fix alert_handler_lpg_sleep_mode_ping tests for silicon (and other envs)

Fix alert_handler_lpg_sleep_mode_ping tests for silicon (and other envs) #4025

Re-run triggered January 6, 2025 19:43
@jwnrtjwnrt
#25779
jwnrt:alert-handler-lpg-sleep-mode-pings
Status Success
Total duration 1h 17m 9s
Artifacts 33

ci.yml

on: pull_request
Lint (quick)
3m 39s
Lint (quick)
Earl Grey for CW310 Hyperdebug  /  Build bitstream
2m 19s
Earl Grey for CW310 Hyperdebug / Build bitstream
Earl Grey for CW310  /  Build bitstream
2m 25s
Earl Grey for CW310 / Build bitstream
Earl Grey for CW340  /  Build bitstream
1m 58s
Earl Grey for CW340 / Build bitstream
Lint (slow)
11m 9s
Lint (slow)
Build documentation
5m 31s
Build documentation
Airgapped build
12m 58s
Airgapped build
Verible lint
4m 11s
Verible lint
Run OTBN smoke Test
2m 29s
Run OTBN smoke Test
Run OTBN crypto tests
19m 55s
Run OTBN crypto tests
Verilated English Breakfast
7m 55s
Verilated English Breakfast
Verilated Earl Grey
1h 21m
Verilated Earl Grey
CW305's Bitstream
21m 52s
CW305's Bitstream
Build Docker Containers
3m 3s
Build Docker Containers
Build and test software
13m 29s
Build and test software
CW310 SiVal Tests  /  FPGA test
31m 20s
CW310 SiVal Tests / FPGA test
CW310 SiVal ROM_EXT Tests  /  FPGA test
36m 17s
CW310 SiVal ROM_EXT Tests / FPGA test
CW310 Manufacturing Tests  /  FPGA test
33m 16s
CW310 Manufacturing Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
15m 6s
CW310 ROM_EXT Tests / FPGA test
CW310 Test ROM Tests  /  FPGA test
6m 29s
CW310 Test ROM Tests / FPGA test
CW310 ROM Tests  /  FPGA test
29m 11s
CW310 ROM Tests / FPGA test
CW310 ROM_EXT Tests  /  FPGA test
5m 44s
CW310 ROM_EXT Tests / FPGA test
CW340 Test ROM Tests  /  FPGA test
53s
CW340 Test ROM Tests / FPGA test
CW340 ROM Tests  /  FPGA test
50s
CW340 ROM Tests / FPGA test
CW340 ROM_EXT Tests  /  FPGA test
1m 6s
CW340 ROM_EXT Tests / FPGA test
CW340 SiVal Tests  /  FPGA test
5m 16s
CW340 SiVal Tests / FPGA test
CW340 SiVal ROM_EXT Tests  /  FPGA test
1m 7s
CW340 SiVal ROM_EXT Tests / FPGA test
CW340 Manufacturing Tests  /  FPGA test
42m 5s
CW340 Manufacturing Tests / FPGA test
Cache bitstreams to GCP
0s
Cache bitstreams to GCP
Verify FPGA jobs
22s
Verify FPGA jobs
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2 errors
Lint (slow)
Process completed with exit code 1.
Build and test software
Process completed with exit code 127.

Artifacts

Produced during runtime
Name Size
chip_englishbreakfast_cw305
1.34 MB