Updated bazel target to include silicon test

Signed-off-by: Ramesh Prakash <rprakas@google.com> Updated bazel target to include silicon tests for aes_interrupt_encryption tests
lowRISC · Jan 2, 2025 · e2f8167 · e2f8167
1 parent e753492
commit e2f8167
Showing 1 changed file with 2 additions and 0 deletions.
diff --git a/sw/device/tests/BUILD b/sw/device/tests/BUILD
@@ -123,9 +123,11 @@ opentitan_test(
     name = "aes_interrupt_encryption_test",
     srcs = ["aes_interrupt_encryption_test.c"],
     exec_env = dicts.add(
+        EARLGREY_SILICON_OWNER_ROM_EXT_ENVS,
         {
             "//hw/top_earlgrey:sim_verilator": None,
             "//hw/top_earlgrey:fpga_cw340_sival": None,
+            "//hw/top_earlgrey:silicon_creator": None,
         },
     ),
     verilator = verilator_params(