fixup: riscv: lint fixes

rust-embedded · Jan 7, 2025 · e9ff3ad · e9ff3ad
1 parent 9fd2f73
commit e9ff3ad
Showing 1 changed file with 2 additions and 2 deletions.
diff --git a/riscv/src/register/satp.rs b/riscv/src/register/satp.rs
@@ -58,7 +58,7 @@ impl Satp {
     #[inline]
     #[cfg(target_pointer_width = "64")]
     pub fn asid(&self) -> usize {
-        self.bits >> 44 & 0xFFFF // bits 44-59
+        (self.bits >> 44) & 0xFFFF // bits 44-59
     }
 
     /// Physical page number
@@ -203,7 +203,7 @@ pub unsafe fn try_set(mode: Mode, asid: usize, ppn: usize) -> Result<()> {
             bitmask: 0xFFF_FFFF_FFFF,
         })
     } else {
-        let bits = (mode as usize) << 60 | (asid << 44) | ppn;
+        let bits = ((mode as usize) << 60) | (asid << 44) | ppn;
         _try_write(bits)
     }
 }